Mentor.Graphics.Calibre.2018.4.25.17
Mentor\’s IC verification and sign-off includes not only traditional rule-based physical verification and parasitic extraction, but also new capabilities and automated technologies that help improve yield by enhancing the design itself. Calibre® is the overwhelming market share leader and the industry standard for IC physical verification, due to the outstanding performance, accuracy and reliability of Calibre products. Over the last two years, Calibre nmDRC™ has reduced average DRC runtime by a factor of five, while Calibre\’s innovative Hyperscaling and MTFlex™ technologies have cut memory requirements in half. Calibre nmDRC also reduced overall cycle time with incremental DRC, which allows designers to make DRC runs in parallel. As DRC violations are reported, designers can immediately fix and recheck just the affected areas, while the initial DRC run continues. To handle complex and multi-variate, multi-dimensional checks that are not adequately addressed by traditional design rules, Calibre nmDRC\’s equation-based DRC (eqDRC) capability enables designers to express design rule checks as continuous, multi-dimensional functions that accurately and precisely reflect underlying physical interactions. With eqDRC, designers can use Calibre nmDRC to address complex DFM issues that other DRC tools simply can\’t handle. Calibre nmLVS provides actual device geometry measurement, programmable electrical rule checking, and sophisticated interactive debugging capabilities to ensure accurate circuit verification and further improve the designer\’s productivity. Calibre Pattern Matching Pattern-driven design correction, analysis and verification Streamline and simplify complex checks Integrate with all major design environments Ensure consistency and accuracy Features and Benefits The underlying hierarchical processing engine ensures robust testing and implementation across all applications, while providing best-in-class runtimes. Common design platform integration enables rapid deployment of all Calibre nm Platform applications into the user’s design environment. Integrated scripting environment across all applications (SVRF and TVF) allow users to customize their design and verification environment to suit the specific and evolving needs of their design teams. Hyperscaling technology brings superior scalability and lightning fast-run times for computationally intense applications, while reducing capital expenditures by extending the useful life of existing shared memory processor systems, and fully utilizing inexpensive distributed rack systems.
product:Mentor.Graphics.Calibre.2018.4.25.17
Lanaguage:english
Platform:Linux/Macosx
Size:1DVD