Synopsys Synplify vJ-2015.03 SP1
Synplify Pro® FPGA synthesis software, part of the Synopsys FPGA design solution, is the industry standard for producing high-performance, cost-effective FPGA designs. Its unique Behavior Extracting Synthesis Technology® (BEST™) performs optimization at a high level first, before synthesizing the RTL code into specific FPGA logic. This approach allows for superior optimization across the FPGA, provides fast runtimes and support for very large designs.
Synplify Pro software supports the latest VHDL and Verilog language constructs including SystemVerilog and VHDL 2008. The software also supports FPGA architectures from a variety of FPGA vendors, including Altera, Lattice Semiconductor, Microsemi (formerly Actel), SiliconBlue and Xilinx, all from a single RTL and constraint source. Synplify Pro software uses a single, easy-to-use interface and has the ability to perform incremental synthesis and intuitive HDL code analysis.
For designers of large designs that need the fastest possible synthesis runtimes and the highest quality timing, area and power results. Synplify® Premier software provides all of the features of Synplify Pro as well as a comprehensive suite of tools for advanced FPGA implementation. In addition, Synplify Premier software delivers RTL compatibility between FPGA and ASIC flows, allowing designers to synthesize their ASIC RTL source files into an FPGA for FPGA-based prototyping. For a detailed comparison of the features available in each tool, see the Synplify Feature Comparison Chart.
product:Synopsys Synplify vJ-2015.03 SP1