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Synopsys System Studio 2006.12 SP1 Linux (CSS)

Synopsys CoCentric System Studio 2006.12 SP1是一个功能强大的系统级设计环境,主要用于面向创新性SoC设计中算法和系统架构的两个至关重要的系统级设计领域。算法设计涵盖了信号处理,例如移动通信、多媒体编码解码器、DSL和调制解调器。架构设计把正确的处理器、定制逻辑电路、总线、内存和外设相结合,以确保芯片得到最有效的利用,并对硬件和软件进行划分。采用Synopsys CoCentric System Studio可以完成硬件和软件要素的设计和集成工作。    当今,系统级的设计主要采用C或C++语言来完成。System C公共标准的出现推动了系统级设计,使之成为了一个连贯的过程。其利用了一套通用的C++类库,精确地建立系统级芯片的硬件和进程的模型,建立模型的方法已不再是以往所采用的各种自行开发方法和工具等支离破碎的方法。 其与RTL验证之间良好的互操作性,通过全新建模技术,为同已有的设计相结合提供了解决方案。范围广泛的模型库和参考设计工具包(RDKs)将商业化设计跨越性地引入先进的无线、多媒体和电信技术标准中。   

● 利用层次化、图形化和语言式的抽象技术,在CoCentric System Studio的统一环境中构造整个系统。   
● 对设计进行可视化,以图形、示意图和符号视图、源代码视图、接口视图、标题视图的方式,轻易地掌握系统级芯片的复杂度。   
● 对仿真虚拟环境中的系统级芯片进行完整的端到端系统仿真和分析   
● 能够在费用较低的设计初期,查出和纠正系统级错误   
● 消除了对建立可综合子模块模型的需求   
● 能够验证包含自定时序,预充电的逻辑电路或动态电路的复杂单元   
● 快速查出仿真模型与相应SPICE网表之间的不同之处   
● 提供实现快速纠正单元失配现象的指导

::::::English Description::::::

System Studio is the high performance model-based algorithm design and analysis tool, combining unmatched simulation performance and highest modeling efficiency, plus industry s best integration into the implementation design and verification flow. Algorithm design is an essential task in signal processing applications such as wireless telephony, multimedia codecs, DSL and cable modems. More than 50% of all mobile phones worldwide rely on algorithms designed with System Studio, making it the clear market leader.

Design Challenges
The design of Signal Processing Algorithms is a key discipline in order to come up with differentiating products, as the algorithm defines the performance and functionality. Algorithm designers must quickly and easily define the mathematical function that is able to meet the requirements. Depending on the final implementation architecture in either hardware or software, they need to move all the way to a bit-true fixed-point specification, to make sure that quantization effects are taken into consideration when analyzing the algorithm s suitability.

System Studio addresses this design challenge by providing a powerful, model-based electronic system-level (ESL) design creation, simulation and analysis environment, for algorithms that is tightly integrated within the Synopsys Discovery™ Verification Platform. System Studio provides extensive support for the design and analysis of complex signal processing functions such as multi-antenna receiver algorithms, multimedia processing, and communication standards compliance. It offers a rich set of analysis functions that designers use to meet the requirements for high-quality user experience with speech, multimedia, and Internet connectivity given the imperfections introduced by transmission, non-ideal analog components, and fixed-point digital implementation. Its unique dataflow simulation engine provides highest simulation performance necessary to explore the design space in an acceptable amount of time. Its fixed point simulation acceleration concepts set it apart from any other solution, achieving a speed improvement of 10x for typical mixed floating-point/fixed-point simulation and up to 200x for fixed-point only simulation. System Studio s intuitive graphical user interface and extensive model libraries and reference design kits (RDKs) jump-start commercial design efforts in the areas of advanced wireless, multimedia and telecom technical standards. Automatic Verilog generation, from fixed-point models of these algorithms, ensure a fast path to synthesizable RTL and silicon.


System Studio s fast performance on single simulation runs is enhanced on compute clusters, taking advantage of multicore architectures, by its native capability to distribute simulation iteration runs to multiple processing elements, then merging the simulation results into a comprehensive report

Key Benefits and Features

  • Model-based Design
    • More than 2000 signal-processing models, from simple to very complex
    • Easy-to-use, unified development environment with both graphical and language abstractions that capture the entire system in a hierarchical fashion
    • Easy integration of existing functions written in C / C++
    • Fixed-point modeling based on standard IEEE 1666 SystemC fixed-point data types
    • Unique range of modeling styles: single rate, multi-rate and dynamic dataflow, extended finite state machines
    • Native SystemC language support
    • Automatic documentation generation that can serve as specification for later design steps, guarantees consistency between simulation model and paper documentation
  • Simulation Performance
    • Compiled Simulation
    • Stream-Driven Simulation™, vector-based processing of static and dynamic dataflow
    • Ultra-fast fixed-point simulation, achieving up to 200x over the OSCI proof-of-concept implementation
    • Enabling industry s fastest simulation and analysis of signal-processing algorithms
    • Unmatched capacity, enabling simulation of your most complex signal processing applications
    • Support to distribute simulations to your compute cluster, taking advantage of the multicore CPU of your installed compute infrastructure
  • Analysis and Debugging
    • Powerful scripting capabilities
    • Automatic design checks to detect data rate and data type mismatches prior to any simulation run
    • Simulation profiler to enable
    • Block and source code debugging
    • Powerful data visualization, both interactive and post-processing, including dedicated views
  • Design Flow Integration
    • SystemC export of algorithm subsystems, for integration into any SystemC-based simulation environment
    • Automatic HDL code generation directly from your algorithm description, with no need for maintaining parallel libraries
    • Automated co-simulation setup with all major RTL simulation tools, allows easy integration of VHDL and Verilog into the system level simulation
    • Slavable simulation interface, allows to plug System Studio into the simulation environment of your choice

product:Synopsys System Studio 2006.12 SP1 Linux (CSS)